{"product_id":"ddr4-sdram","title":"DDR4 SDRAM","description":"\u003cp\u003e\u003cb\u003eDouble Data Rate 4 Synchronous Dynamic Random-Access Memory\u003c\/b\u003e (\u003cb\u003eDDR4 SDRAM\u003c\/b\u003e is a type of \u003ca href=\"\/he\/wiki\/Synchronous_dynamic_random-access_memory\" title=\"Synchronous dynamic random-access memory\"\u003esynchronous dynamic random-access memory\u003c\/a\u003e with a high \u003ca href=\"\/he\/wiki\/Bandwidth_(computing\" title=\"Bandwidth (computing\"\u003ebandwidth\u003c\/a\u003e (\"\u003ca href=\"\/he\/wiki\/Double_data_rate\" title=\"Double data rate\"\u003edouble data rate\u003c\/a\u003e\" interface.\u003c\/p\u003e\u003cp\u003eReleased to the market in 2014,\u003csup\u003e\u003ca href=\"#cite_note-hynix_April_2011-2\"\u003e\u003cspan\u003e[\u003c\/span\u003e2\u003cspan\u003e]\u003c\/span\u003e\u003c\/a\u003e\u003c\/sup\u003e\u003csup\u003e\u003ca href=\"#cite_note-micron_May_2012-3\"\u003e\u003cspan\u003e[\u003c\/span\u003e3\u003cspan\u003e]\u003c\/span\u003e\u003c\/a\u003e\u003c\/sup\u003e\u003csup\u003e\u003ca href=\"#cite_note-4\"\u003e\u003cspan\u003e[\u003c\/span\u003e4\u003cspan\u003e]\u003c\/span\u003e\u003c\/a\u003e\u003c\/sup\u003e it is a variant of \u003ca href=\"\/he\/wiki\/Dynamic_random-access_memory\" title=\"Dynamic random-access memory\"\u003edynamic random-access memory\u003c\/a\u003e (DRAM, some of which have been in use since the early 1970s,\u003csup\u003e\u003ca href=\"#cite_note-dram_story-5\"\u003e\u003cspan\u003e[\u003c\/span\u003e5\u003cspan\u003e]\u003c\/span\u003e\u003c\/a\u003e\u003c\/sup\u003e and a higher-speed successor to the \u003ca href=\"\/he\/wiki\/DDR2_SDRAM\" title=\"DDR2 SDRAM\"\u003eDDR2\u003c\/a\u003e and \u003ca href=\"\/he\/wiki\/DDR3_SDRAM\" title=\"DDR3 SDRAM\"\u003eDDR3\u003c\/a\u003e technologies.\u003c\/p\u003e\u003cp\u003eDDR4 is not compatible with any earlier type of random-access memory (RAM due to different signaling voltage and physical interface, besides other factors.\u003c\/p\u003e\u003cp\u003eDDR4 \u003ca href=\"\/he\/wiki\/DDR_SDRAM\" title=\"DDR SDRAM\"\u003eSDRAM\u003c\/a\u003e was released to the public market in Q2 2014, focusing on \u003ca href=\"\/he\/wiki\/ECC_memory\" title=\"ECC memory\"\u003eECC memory\u003c\/a\u003e,\u003csup\u003e\u003ca href=\"#cite_note-6\"\u003e\u003cspan\u003e[\u003c\/span\u003e6\u003cspan\u003e]\u003c\/span\u003e\u003c\/a\u003e\u003c\/sup\u003e while the non-ECC DDR4 modules became available in Q3 2014, accompanying the launch of \u003ca href=\"\/he\/wiki\/Haswell-E\" title=\"Haswell-E\"\u003eHaswell-E\u003c\/a\u003e processors that require DDR4 memory.\u003csup\u003e\u003ca href=\"#cite_note-7\"\u003e\u003cspan\u003e[\u003c\/span\u003e7\u003cspan\u003e]\u003c\/span\u003e\u003c\/a\u003e\u003c\/sup\u003e\u003c\/p\u003e","brand":"Micron Technology","offers":[{"title":"Default Title","offer_id":48007331872985,"sku":null,"price":220.0,"currency_code":"USD","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/0016\/5327\/6707\/files\/Samsung_displays_first_DDR4_module.jpg?v=1766150410","url":"https:\/\/www.aloinfousa.com\/he\/products\/ddr4-sdram","provider":"aloinfousa.com","version":"1.0","type":"link"}